Equations

********** Mapped Logic **********
$OpTx$$OpTx$FX_DC$20_INV$52 <= (NOT DA0 AND DA1 AND DA2);
$OpTx$FX_DC$18 <= NOT (CSEL
      XOR
     $OpTx$FX_DC$18 <= NOT (XLXI_620/XLXN_43.LFBK);
FTCPE_AEN: FTCPE port map (AEN,AEN_T,DIOWn,'0',NOT RESETn);
     AEN_T <= ((DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND DD(6).PIN AND CSEL AND FC_0_.OUT AND
      XLXI_620/XLXN_43.LFBK AND XLXN_413.LFBK)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND DD(6).PIN AND NOT CSEL AND FC_0_.OUT AND
      NOT XLXI_620/XLXN_43.LFBK AND XLXN_413.LFBK)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT DD(6).PIN AND CSEL AND FC_0_.OUT AND
      XLXI_620/XLXN_43.LFBK AND NOT XLXN_413.LFBK)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT DD(6).PIN AND NOT CSEL AND FC_0_.OUT AND
      NOT XLXI_620/XLXN_43.LFBK AND NOT XLXN_413.LFBK));
DD_I(0) <= ((EXP4_.EXP)
      OR (WR_DATA_ENABLE.EXP)
      OR (NOT DA0 AND XLXN_802(0))
      OR (DA1 AND XLXN_802(0))
      OR (NOT DA2 AND XLXN_802(0))
      OR (NOT DMACKn AND XLXN_802(0))
      OR (NOT CS1n AND XLXN_802(0)));
DD_I(1) <= ((EXP0_.EXP)
      OR (EXP1_.EXP)
      OR (NOT DA0 AND XLXN_802(1))
      OR (DA1 AND XLXN_802(1))
      OR (NOT DA2 AND XLXN_802(1))
      OR (NOT DMACKn AND XLXN_802(1))
      OR (NOT CS1n AND XLXN_802(1)));
DD_I(2) <= ((EXP5_.EXP)
      OR (XLXN_769.EXP)
      OR (NOT DA0 AND XLXN_802(2))
      OR (DA1 AND XLXN_802(2))
      OR (NOT DA2 AND XLXN_802(2))
      OR (NOT DMACKn AND XLXN_802(2))
      OR (NOT CS1n AND XLXN_802(2)));
DD_I(3) <= ((XLXN_802(0).EXP)
      OR (EXP6_.EXP)
      OR (NOT DA0 AND XLXN_802(3))
      OR (DA1 AND XLXN_802(3))
      OR (NOT DA2 AND XLXN_802(3))
      OR (NOT DMACKn AND XLXN_802(3))
      OR (NOT CS1n AND XLXN_802(3)));
DD_I(4) <= ((EXP3_.EXP)
      OR (XLXN_803(7).EXP)
      OR (NOT DA0 AND XLXN_802(4).LFBK)
      OR (DA1 AND XLXN_802(4).LFBK)
      OR (NOT DA2 AND XLXN_802(4).LFBK)
      OR (NOT DMACKn AND XLXN_802(4).LFBK)
      OR (NOT CS1n AND XLXN_802(4).LFBK));
DD_I(5) <= ((EXP7_.EXP)
      OR (ISA_CLEAR.EXP)
      OR (NOT DA0 AND XLXN_802(5))
      OR (DA1 AND XLXN_802(5))
      OR (NOT DA2 AND XLXN_802(5))
      OR (NOT DMACKn AND XLXN_802(5))
      OR (NOT CS1n AND XLXN_802(5)));
DD_I(6) <= ((EXP8_.EXP)
      OR (EXP9_.EXP)
      OR (NOT DA0 AND XLXN_802(6))
      OR (DA1 AND XLXN_802(6))
      OR (NOT DA2 AND XLXN_802(6))
      OR (NOT DMACKn AND XLXN_802(6))
      OR (NOT CS1n AND XLXN_802(6)));
DD_I(7) <= ((EXP10_.EXP)
      OR (WR_REQUEST.EXP)
      OR (NOT DA0 AND XLXN_802(7))
      OR (DA1 AND XLXN_802(7))
      OR (NOT DA2 AND XLXN_802(7))
      OR (NOT DMACKn AND XLXN_802(7))
      OR (NOT CS1n AND XLXN_802(7)));
FTCPE_DH0: FTCPE port map (DH0,DH0_T,DIOWn,NOT RESETn,'0');
     DH0_T <= ((NOT DA0 AND DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND DD(0).PIN AND NOT DH0.LFBK)
      OR (NOT DA0 AND DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT DD(0).PIN AND DH0.LFBK));
FTCPE_DH1: FTCPE port map (DH1,DH1_T,DIOWn,NOT RESETn,'0');
     DH1_T <= ((NOT DA0 AND DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND DD(1).PIN AND NOT DH1.LFBK)
      OR (NOT DA0 AND DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT DD(1).PIN AND DH1.LFBK));
FTCPE_DH2: FTCPE port map (DH2,DH2_T,DIOWn,NOT RESETn,'0');
     DH2_T <= ((NOT DA0 AND DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND DD(2).PIN AND NOT DH2.LFBK)
      OR (NOT DA0 AND DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT DD(2).PIN AND DH2.LFBK));
FTCPE_DH3: FTCPE port map (DH3,DH3_T,DIOWn,NOT RESETn,'0');
     DH3_T <= ((NOT DA0 AND DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND DD(3).PIN AND NOT DH3.LFBK)
      OR (NOT DA0 AND DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT DD(3).PIN AND DH3.LFBK));
FTCPE_GATE_IORDY: FTCPE port map (GATE_IORDY,GATE_IORDY_T,DIOWn,NOT RESETn,'0');
     GATE_IORDY_T <= ((DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND DD(5).PIN AND CSEL AND FC_0_.OUT AND
      XLXI_620/XLXN_43.LFBK AND NOT GATE_IORDY.LFBK)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND DD(5).PIN AND NOT CSEL AND FC_0_.OUT AND
      NOT XLXI_620/XLXN_43.LFBK AND NOT GATE_IORDY.LFBK)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT DD(5).PIN AND CSEL AND FC_0_.OUT AND
      XLXI_620/XLXN_43.LFBK AND GATE_IORDY.LFBK)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT DD(5).PIN AND NOT CSEL AND FC_0_.OUT AND
      NOT XLXI_620/XLXN_43.LFBK AND GATE_IORDY.LFBK));
FTCPE_GATE_ITRP: FTCPE port map (GATE_ITRP,GATE_ITRP_T,DIOWn,NOT RESETn,'0');
     GATE_ITRP_T <= ((DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(7).PIN AND CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND NOT GATE_ITRP.LFBK)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(7).PIN AND CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND GATE_ITRP.LFBK)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(7).PIN AND NOT CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND NOT GATE_ITRP.LFBK)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT DD(7).PIN AND NOT CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND GATE_ITRP.LFBK));
FTCPE_INTE_A: FTCPE port map (INTE_A,INTE_A_T,DIOWn,NOT RESETn,'0');
     INTE_A_T <= ((DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(0).PIN AND CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND NOT INTE_A.LFBK)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(0).PIN AND CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND INTE_A.LFBK)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(0).PIN AND NOT CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND NOT INTE_A.LFBK)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT DD(0).PIN AND NOT CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND INTE_A.LFBK));
FTCPE_INTE_B: FTCPE port map (INTE_B,INTE_B_T,DIOWn,NOT RESETn,'0');
     INTE_B_T <= ((DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(1).PIN AND CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND NOT INTE_B.LFBK)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(1).PIN AND CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND INTE_B.LFBK)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(1).PIN AND NOT CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND NOT INTE_B.LFBK)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT DD(1).PIN AND NOT CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND INTE_B.LFBK));
FTCPE_INTE_C: FTCPE port map (INTE_C,INTE_C_T,DIOWn,NOT RESETn,'0');
     INTE_C_T <= ((DH0.EXP)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(2).PIN AND CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND NOT INTE_C.LFBK)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(2).PIN AND CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND INTE_C.LFBK)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(2).PIN AND NOT CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND NOT INTE_C.LFBK));
FTCPE_INTE_D: FTCPE port map (INTE_D,INTE_D_T,DIOWn,NOT RESETn,'0');
     INTE_D_T <= ((DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(3).PIN AND CSEL AND FC_0_.OUT AND
      NOT INTE_D.LFBK)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(3).PIN AND CSEL AND FC_0_.OUT AND
      INTE_D.LFBK)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(3).PIN AND NOT CSEL AND FC_0_.OUT AND
      NOT INTE_D.LFBK)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT DD(3).PIN AND NOT CSEL AND FC_0_.OUT AND
      INTE_D.LFBK));
INTRQ_I <= NOT (FC_3_.OUT);
     INTRQ <= INTRQ_I when INTRQ_OE = '1' else 'Z';
     INTRQ_OE <= GATE_ITRP;
IORDY_I <= ((DIOWn AND DIORn)
      OR (NOT RD_PENDING AND ISA_WRITEn AND FC_1_.OUT));
     IORDY <= IORDY_I when IORDY_OE = '1' else 'Z';
     IORDY_OE <= (DMACKn AND CS1n AND NOT DMARQ AND NOT CS0n AND FC_2_.OUT AND
      GATE_IORDY.LFBK);
IORn <= NOT ((NOT ISA_READn AND ISA_PULSE.LFBK));
IOWn <= NOT ((ISA_PULSE AND NOT ISA_WRITEn));
FDCPE_ISA_PULSE: FDCPE port map (ISA_PULSE,ISA_PULSE_D,CLK,NOT XLXN_428/XLXN_428_SETF__$INT,'0');
     ISA_PULSE_D <= ((NOT QSR(5) AND ISA_PULSE.LFBK)
      OR (NOT FC_4_.OUT AND IDLE.LFBK));
FDCPE_ISA_READn: FDCPE port map (ISA_READn,ISA_READn_D,CLK,'0',NOT XLXN_428/XLXN_428_SETF__$INT);
     ISA_READn_D <= ((QSR(7) AND NOT WR_REQUEST AND RD_REQUEST)
      OR (NOT QSR(7) AND NOT SEQn AND NOT XLXN_428.LFBK)
      OR (NOT WR_REQUEST AND RD_REQUEST AND SEQn));
ISA_RESET <= NOT ((RESETn AND NOT RESET_CTL));
FDCPE_ISA_WRITEn: FDCPE port map (ISA_WRITEn,ISA_WRITEn_D,CLK,'0',NOT XLXN_428/XLXN_428_SETF__$INT);
     ISA_WRITEn_D <= ((QSR(7) AND WR_REQUEST)
      OR (WR_REQUEST AND SEQn)
      OR (NOT QSR(7) AND NOT SEQn AND NOT XLXN_425.LFBK));
FDCPE_ITRP_STA0: FDCPE port map (ITRP_STA(0),'1',INT_A,ITRP_STA_CLR(0),'0');
     ITRP_STA_CLR(0) <= (RESETn AND NOT RESET_CTL AND NOT INTE_A.LFBK);
FDCPE_ITRP_STA1: FDCPE port map (ITRP_STA(1),'1',INT_B,ITRP_STA_CLR(1),'0');
     ITRP_STA_CLR(1) <= (RESETn AND NOT RESET_CTL AND NOT INTE_B.LFBK);
FDCPE_ITRP_STA2: FDCPE port map (ITRP_STA(2),'1',INT_C,ITRP_STA_CLR(2),'0');
     ITRP_STA_CLR(2) <= (RESETn AND NOT INTE_C AND NOT RESET_CTL);
FDCPE_ITRP_STA3: FDCPE port map (ITRP_STA(3),'1',INT_D,ITRP_STA_CLR(3),'0');
     ITRP_STA_CLR(3) <= (RESETn AND NOT RESET_CTL AND NOT INTE_D.LFBK);
ITRPn <= FC_3_.OUT;
FDCPE_QSR1: FDCPE port map (QSR(1),QSR_D(1),CLK,NOT XLXN_428/XLXN_428_SETF__$INT,'0');
     QSR_D(1) <= ((NOT SEQn AND NOT ISA_WRITEn AND NOT QSR(7).LFBK)
      OR (NOT SEQn AND NOT ISA_READn AND NOT QSR(7).LFBK)
      OR (ISA_WRITEn AND ISA_READn AND NOT QSR(7).LFBK AND
      QSR(1).LFBK));
FDCPE_QSR2: FDCPE port map (QSR(2),QSR_D(2),CLK,NOT XLXN_428/XLXN_428_SETF__$INT,'0');
     QSR_D(2) <= ((NOT ISA_WRITEn AND NOT QSR(7).LFBK AND QSR(1).LFBK)
      OR (NOT ISA_READn AND NOT QSR(7).LFBK AND QSR(1).LFBK)
      OR (ISA_WRITEn AND ISA_READn AND NOT QSR(7).LFBK AND
      QSR(2).LFBK));
FDCPE_QSR5: FDCPE port map (QSR(5),QSR_D(5),CLK,NOT XLXN_428/XLXN_428_SETF__$INT,'0');
     QSR_D(5) <= ((NOT ISA_WRITEn AND NOT QSR(7).LFBK AND XLXI_385/Q(4).LFBK)
      OR (NOT ISA_READn AND NOT QSR(7).LFBK AND XLXI_385/Q(4).LFBK)
      OR (ISA_WRITEn AND ISA_READn AND NOT QSR(7).LFBK AND
      QSR(5).LFBK));
FDCPE_QSR6: FDCPE port map (QSR(6),QSR_D(6),CLK,NOT XLXN_428/XLXN_428_SETF__$INT,'0');
     QSR_D(6) <= ((NOT ISA_WRITEn AND NOT QSR(7).LFBK AND QSR(5).LFBK)
      OR (NOT ISA_READn AND NOT QSR(7).LFBK AND QSR(5).LFBK)
      OR (ISA_WRITEn AND ISA_READn AND NOT QSR(7).LFBK AND
      QSR(6).LFBK));
FDCPE_QSR7: FDCPE port map (QSR(7),QSR_D(7),CLK,NOT XLXN_428/XLXN_428_SETF__$INT,'0');
     QSR_D(7) <= ((NOT ISA_WRITEn AND NOT QSR(7).LFBK AND QSR(6).LFBK)
      OR (NOT ISA_READn AND NOT QSR(7).LFBK AND QSR(6).LFBK));
FDCPE_RD_PENDING: FDCPE port map (RD_PENDING,RD_PENDING_D,NOT DIORn,RD_PENDING/RD_PENDING_RSTF.LFBK,'0');
     RD_PENDING_D <= ((NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND CSEL AND FC_0_.OUT)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT CSEL AND FC_0_.OUT));
RD_PENDING/RD_PENDING_RSTF <= ((NOT RESETn)
      OR (RESET_CTL.LFBK)
      OR (NOT ISA_READn AND QSR(1).LFBK AND NOT QSR(2).LFBK));
FDCPE_RD_REQUEST: FDCPE port map (RD_REQUEST,RD_PENDING,CLK,NOT XLXN_428/XLXN_428_SETF__$INT,'0');
REO <= ((INTE_C.EXP)
      OR (DA0 AND DMACKn AND CS1n AND NOT DMARQ AND NOT CS0n AND NOT DIORn AND
      XLXI_620/XLXN_43 AND CSEL AND NOT DH0.LFBK AND NOT DH1.LFBK AND DH2.LFBK AND
      DH3.LFBK)
      OR (DA0 AND DMACKn AND CS1n AND NOT DMARQ AND NOT CS0n AND NOT DIORn AND
      NOT XLXI_620/XLXN_43 AND NOT CSEL AND NOT DH0.LFBK AND NOT DH1.LFBK AND DH2.LFBK AND
      DH3.LFBK)
      OR (NOT DA1 AND DMACKn AND CS1n AND NOT DMARQ AND NOT CS0n AND NOT DIORn AND
      XLXI_620/XLXN_43 AND CSEL AND NOT DH0.LFBK AND NOT DH1.LFBK AND DH2.LFBK AND
      DH3.LFBK)
      OR (NOT DA1 AND DMACKn AND CS1n AND NOT DMARQ AND NOT CS0n AND NOT DIORn AND
      NOT XLXI_620/XLXN_43 AND NOT CSEL AND NOT DH0.LFBK AND NOT DH1.LFBK AND DH2.LFBK AND
      DH3.LFBK)
      OR (NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND NOT CS0n AND NOT DIORn AND
      XLXI_620/XLXN_43 AND CSEL AND NOT DH0.LFBK AND NOT DH1.LFBK AND DH2.LFBK AND
      DH3.LFBK));
FTCPE_RESET_CTL: FTCPE port map (RESET_CTL,RESET_CTL_T,DIOWn,NOT RESETn,'0');
     RESET_CTL_T <= ((DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(4).PIN AND CSEL AND FC_0_.OUT AND
      NOT RESET_CTL.LFBK)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(4).PIN AND CSEL AND FC_0_.OUT AND
      RESET_CTL.LFBK)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(4).PIN AND NOT CSEL AND FC_0_.OUT AND
      NOT RESET_CTL.LFBK)
      OR (DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT DD(4).PIN AND NOT CSEL AND FC_0_.OUT AND
      RESET_CTL.LFBK));
FTCPE_SA_HIGH0: FTCPE port map (SA_HIGH(0),SA_HIGH_T(0),DIOWn,NOT RESETn,'0');
     SA_HIGH_T(0) <= ((DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(0).PIN AND CSEL AND FC_0_.OUT AND
      NOT XLXN_49(0).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(0).PIN AND CSEL AND FC_0_.OUT AND
      XLXN_49(0).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(0).PIN AND NOT CSEL AND FC_0_.OUT AND
      NOT XLXN_49(0).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT DD(0).PIN AND NOT CSEL AND FC_0_.OUT AND
      XLXN_49(0).LFBK));
FTCPE_SA_HIGH1: FTCPE port map (SA_HIGH(1),SA_HIGH_T(1),DIOWn,NOT RESETn,'0');
     SA_HIGH_T(1) <= ((DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(1).PIN AND CSEL AND FC_0_.OUT AND
      NOT XLXN_49(1).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(1).PIN AND CSEL AND FC_0_.OUT AND
      XLXN_49(1).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(1).PIN AND NOT CSEL AND FC_0_.OUT AND
      NOT XLXN_49(1).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT DD(1).PIN AND NOT CSEL AND FC_0_.OUT AND
      XLXN_49(1).LFBK));
FTCPE_SA_HIGH2: FTCPE port map (SA_HIGH(2),SA_HIGH_T(2),DIOWn,NOT RESETn,'0');
     SA_HIGH_T(2) <= ((DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(2).PIN AND CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND NOT XLXN_49(2).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(2).PIN AND CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND XLXN_49(2).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(2).PIN AND NOT CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND NOT XLXN_49(2).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT DD(2).PIN AND NOT CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND XLXN_49(2).LFBK));
FTCPE_SA_HIGH3: FTCPE port map (SA_HIGH(3),SA_HIGH_T(3),DIOWn,NOT RESETn,'0');
     SA_HIGH_T(3) <= ((DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(3).PIN AND CSEL AND FC_0_.OUT AND
      NOT XLXN_49(3).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(3).PIN AND CSEL AND FC_0_.OUT AND
      XLXN_49(3).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(3).PIN AND NOT CSEL AND FC_0_.OUT AND
      NOT XLXN_49(3).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT DD(3).PIN AND NOT CSEL AND FC_0_.OUT AND
      XLXN_49(3).LFBK));
FTCPE_SA_HIGH4: FTCPE port map (SA_HIGH(4),SA_HIGH_T(4),DIOWn,NOT RESETn,'0');
     SA_HIGH_T(4) <= ((DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(4).PIN AND CSEL AND FC_0_.OUT AND
      NOT XLXN_49(4).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(4).PIN AND CSEL AND FC_0_.OUT AND
      XLXN_49(4).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(4).PIN AND NOT CSEL AND FC_0_.OUT AND
      NOT XLXN_49(4).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT DD(4).PIN AND NOT CSEL AND FC_0_.OUT AND
      XLXN_49(4).LFBK));
FTCPE_SA_HIGH5: FTCPE port map (SA_HIGH(5),SA_HIGH_T(5),DIOWn,NOT RESETn,'0');
     SA_HIGH_T(5) <= ((DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(5).PIN AND CSEL AND FC_0_.OUT AND
      NOT XLXN_49(5).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(5).PIN AND CSEL AND FC_0_.OUT AND
      XLXN_49(5).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(5).PIN AND NOT CSEL AND FC_0_.OUT AND
      NOT XLXN_49(5).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT DD(5).PIN AND NOT CSEL AND FC_0_.OUT AND
      XLXN_49(5).LFBK));
FTCPE_SA_HIGH6: FTCPE port map (SA_HIGH(6),SA_HIGH_T(6),DIOWn,NOT RESETn,'0');
     SA_HIGH_T(6) <= ((DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(6).PIN AND CSEL AND FC_0_.OUT AND
      NOT XLXN_49(6).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(6).PIN AND CSEL AND FC_0_.OUT AND
      XLXN_49(6).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(6).PIN AND NOT CSEL AND FC_0_.OUT AND
      NOT XLXN_49(6).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT DD(6).PIN AND NOT CSEL AND FC_0_.OUT AND
      XLXN_49(6).LFBK));
FTCPE_SA_HIGH7: FTCPE port map (SA_HIGH(7),SA_HIGH_T(7),DIOWn,NOT RESETn,'0');
     SA_HIGH_T(7) <= ((DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(7).PIN AND CSEL AND FC_0_.OUT AND
      NOT XLXN_49(7).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(7).PIN AND CSEL AND FC_0_.OUT AND
      XLXN_49(7).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(7).PIN AND NOT CSEL AND FC_0_.OUT AND
      NOT XLXN_49(7).LFBK)
      OR (DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT DD(7).PIN AND NOT CSEL AND FC_0_.OUT AND
      XLXN_49(7).LFBK));
FTCPE_SA_LOW0: FTCPE port map (SA_LOW(0),SA_LOW_T(0),DIOWn,NOT RESETn,'0');
     SA_LOW_T(0) <= ((NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(0).PIN AND CSEL AND FC_0_.OUT AND
      NOT XLXN_48(0).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(0).PIN AND CSEL AND FC_0_.OUT AND
      XLXN_48(0).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(0).PIN AND NOT CSEL AND FC_0_.OUT AND
      NOT XLXN_48(0).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT DD(0).PIN AND NOT CSEL AND FC_0_.OUT AND
      XLXN_48(0).LFBK));
FTCPE_SA_LOW1: FTCPE port map (SA_LOW(1),SA_LOW_T(1),DIOWn,NOT RESETn,'0');
     SA_LOW_T(1) <= ((NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(1).PIN AND CSEL AND FC_0_.OUT AND
      NOT XLXN_48(1).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(1).PIN AND CSEL AND FC_0_.OUT AND
      XLXN_48(1).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(1).PIN AND NOT CSEL AND FC_0_.OUT AND
      NOT XLXN_48(1).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT DD(1).PIN AND NOT CSEL AND FC_0_.OUT AND
      XLXN_48(1).LFBK));
FTCPE_SA_LOW2: FTCPE port map (SA_LOW(2),SA_LOW_T(2),DIOWn,NOT RESETn,'0');
     SA_LOW_T(2) <= ((NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(2).PIN AND CSEL AND FC_0_.OUT AND
      NOT XLXN_48(2).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(2).PIN AND CSEL AND FC_0_.OUT AND
      XLXN_48(2).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(2).PIN AND NOT CSEL AND FC_0_.OUT AND
      NOT XLXN_48(2).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT DD(2).PIN AND NOT CSEL AND FC_0_.OUT AND
      XLXN_48(2).LFBK));
FTCPE_SA_LOW3: FTCPE port map (SA_LOW(3),SA_LOW_T(3),DIOWn,NOT RESETn,'0');
     SA_LOW_T(3) <= ((NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(3).PIN AND CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND NOT XLXN_48(3).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(3).PIN AND CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND XLXN_48(3).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(3).PIN AND NOT CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND NOT XLXN_48(3).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT DD(3).PIN AND NOT CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND XLXN_48(3).LFBK));
FTCPE_SA_LOW4: FTCPE port map (SA_LOW(4),SA_LOW_T(4),DIOWn,NOT RESETn,'0');
     SA_LOW_T(4) <= ((NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(4).PIN AND CSEL AND FC_0_.OUT AND
      NOT XLXN_48(4).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(4).PIN AND CSEL AND FC_0_.OUT AND
      XLXN_48(4).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(4).PIN AND NOT CSEL AND FC_0_.OUT AND
      NOT XLXN_48(4).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT DD(4).PIN AND NOT CSEL AND FC_0_.OUT AND
      XLXN_48(4).LFBK));
FTCPE_SA_LOW5: FTCPE port map (SA_LOW(5),SA_LOW_T(5),DIOWn,NOT RESETn,'0');
     SA_LOW_T(5) <= ((NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(5).PIN AND CSEL AND FC_0_.OUT AND
      NOT XLXN_48(5).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(5).PIN AND CSEL AND FC_0_.OUT AND
      XLXN_48(5).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(5).PIN AND NOT CSEL AND FC_0_.OUT AND
      NOT XLXN_48(5).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT DD(5).PIN AND NOT CSEL AND FC_0_.OUT AND
      XLXN_48(5).LFBK));
FTCPE_SA_LOW6: FTCPE port map (SA_LOW(6),SA_LOW_T(6),DIOWn,NOT RESETn,'0');
     SA_LOW_T(6) <= ((NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(6).PIN AND CSEL AND FC_0_.OUT AND
      NOT XLXN_48(6).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(6).PIN AND CSEL AND FC_0_.OUT AND
      XLXN_48(6).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(6).PIN AND NOT CSEL AND FC_0_.OUT AND
      NOT XLXN_48(6).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT DD(6).PIN AND NOT CSEL AND FC_0_.OUT AND
      XLXN_48(6).LFBK));
FTCPE_SA_LOW7: FTCPE port map (SA_LOW(7),SA_LOW_T(7),DIOWn,NOT RESETn,'0');
     SA_LOW_T(7) <= ((NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(7).PIN AND CSEL AND FC_0_.OUT AND
      NOT XLXN_48(7).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(7).PIN AND CSEL AND FC_0_.OUT AND
      XLXN_48(7).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(7).PIN AND NOT CSEL AND FC_0_.OUT AND
      NOT XLXN_48(7).LFBK)
      OR (NOT DA0 AND DA1 AND NOT DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT DD(7).PIN AND NOT CSEL AND FC_0_.OUT AND
      XLXN_48(7).LFBK));
FTCPE_SD0: FTCPE port map (SD_I(0),SD_T(0),DIOWn,NOT RESETn,'0');
     SD_T(0) <= ((XLXN_803(0).EXP)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(0).PIN AND CSEL AND
      NOT ISA_WR_DATA(0).LFBK AND NOT DH0.LFBK AND NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(0).PIN AND CSEL AND
      ISA_WR_DATA(0).LFBK AND NOT DH0.LFBK AND NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(0).PIN AND NOT CSEL AND
      NOT ISA_WR_DATA(0).LFBK AND NOT DH0.LFBK AND NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK));
     SD(0) <= SD_I(0) when SD_OE(0) = '1' else 'Z';
     SD_OE(0) <= WR_DATA_ENABLE;
FTCPE_SD1: FTCPE port map (SD_I(1),SD_T(1),DIOWn,NOT RESETn,'0');
     SD_T(1) <= ((ITRP_STA(0).EXP)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(1).PIN AND CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND NOT ISA_WR_DATA(1).LFBK)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(1).PIN AND CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND ISA_WR_DATA(1).LFBK)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(1).PIN AND NOT CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND NOT ISA_WR_DATA(1).LFBK));
     SD(1) <= SD_I(1) when SD_OE(1) = '1' else 'Z';
     SD_OE(1) <= WR_DATA_ENABLE;
FTCPE_SD2: FTCPE port map (SD_I(2),SD_T(2),DIOWn,NOT RESETn,'0');
     SD_T(2) <= ((DH3.EXP)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(2).PIN AND CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND NOT ISA_WR_DATA(2).LFBK)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(2).PIN AND CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND ISA_WR_DATA(2).LFBK)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(2).PIN AND NOT CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND NOT ISA_WR_DATA(2).LFBK));
     SD(2) <= SD_I(2) when SD_OE(2) = '1' else 'Z';
     SD_OE(2) <= WR_DATA_ENABLE;
FTCPE_SD3: FTCPE port map (SD_I(3),SD_T(3),DIOWn,NOT RESETn,'0');
     SD_T(3) <= ((EXP2_.EXP)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(3).PIN AND CSEL AND FC_0_.OUT AND
      NOT ISA_WR_DATA(3).LFBK)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(3).PIN AND CSEL AND FC_0_.OUT AND
      ISA_WR_DATA(3).LFBK)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT DD(3).PIN AND NOT CSEL AND FC_0_.OUT AND
      ISA_WR_DATA(3).LFBK));
     SD(3) <= SD_I(3) when SD_OE(3) = '1' else 'Z';
     SD_OE(3) <= WR_DATA_ENABLE.LFBK;
FTCPE_SD4: FTCPE port map (SD_I(4),SD_T(4),DIOWn,NOT RESETn,'0');
     SD_T(4) <= ((XLXN_803(6).EXP)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND DD(4).PIN AND CSEL AND FC_0_.OUT AND
      NOT ISA_WR_DATA(4).LFBK AND XLXI_620/XLXN_43.LFBK)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT DD(4).PIN AND CSEL AND FC_0_.OUT AND
      ISA_WR_DATA(4).LFBK AND XLXI_620/XLXN_43.LFBK)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT DD(4).PIN AND NOT CSEL AND FC_0_.OUT AND
      ISA_WR_DATA(4).LFBK AND NOT XLXI_620/XLXN_43.LFBK));
     SD(4) <= SD_I(4) when SD_OE(4) = '1' else 'Z';
     SD_OE(4) <= WR_DATA_ENABLE;
FTCPE_SD5: FTCPE port map (SD_I(5),SD_T(5),DIOWn,NOT RESETn,'0');
     SD_T(5) <= ((XLXN_803(5).EXP)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND DD(5).PIN AND CSEL AND FC_0_.OUT AND
      XLXI_620/XLXN_43.LFBK AND NOT ISA_WR_DATA(5).LFBK)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT DD(5).PIN AND CSEL AND FC_0_.OUT AND
      XLXI_620/XLXN_43.LFBK AND ISA_WR_DATA(5).LFBK)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT DD(5).PIN AND NOT CSEL AND FC_0_.OUT AND
      NOT XLXI_620/XLXN_43.LFBK AND ISA_WR_DATA(5).LFBK));
     SD(5) <= SD_I(5) when SD_OE(5) = '1' else 'Z';
     SD_OE(5) <= WR_DATA_ENABLE;
FTCPE_SD6: FTCPE port map (SD_I(6),SD_T(6),DIOWn,NOT RESETn,'0');
     SD_T(6) <= (($OpTx$$OpTx$FX_DC$20_INV$52.EXP)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND DD(6).PIN AND CSEL AND FC_0_.OUT AND
      XLXI_620/XLXN_43.LFBK AND NOT ISA_WR_DATA(6).LFBK)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT DD(6).PIN AND CSEL AND FC_0_.OUT AND
      XLXI_620/XLXN_43.LFBK AND ISA_WR_DATA(6).LFBK)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT DD(6).PIN AND NOT CSEL AND FC_0_.OUT AND
      NOT XLXI_620/XLXN_43.LFBK AND ISA_WR_DATA(6).LFBK));
     SD(6) <= SD_I(6) when SD_OE(6) = '1' else 'Z';
     SD_OE(6) <= WR_DATA_ENABLE;
FTCPE_SD7: FTCPE port map (SD_I(7),SD_T(7),DIOWn,NOT RESETn,'0');
     SD_T(7) <= ((DH1.EXP)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND DD(7).PIN AND CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND NOT ISA_WR_DATA(7).LFBK)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND NOT DD(7).PIN AND CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND ISA_WR_DATA(7).LFBK)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND DD(7).PIN AND NOT CSEL AND NOT DH0.LFBK AND
      NOT DH1.LFBK AND DH2.LFBK AND DH3.LFBK AND NOT ISA_WR_DATA(7).LFBK));
     SD(7) <= SD_I(7) when SD_OE(7) = '1' else 'Z';
     SD_OE(7) <= WR_DATA_ENABLE;
SELECTEDn <= XLXI_620/XLXN_43.LFBK
      XOR
     SELECTEDn <= CSEL;
FDCPE_SEQn: FDCPE port map (SEQn,SEQn_D,CLK,'0',NOT XLXN_428/XLXN_428_SETF__$INT);
     SEQn_D <= ((QSR(7))
      OR (ISA_WRITEn AND ISA_READn AND IDLE.LFBK));
FDCPE_WR_DATA_ENABLE: FDCPE port map (WR_DATA_ENABLE,WR_DATA_ENABLE_D,CLK,NOT XLXN_428/XLXN_428_SETF__$INT,'0');
     WR_DATA_ENABLE_D <= ((WR_REQUEST AND SEQn)
      OR (NOT QSR(6) AND WR_DATA_ENABLE.LFBK));
FDCPE_WR_PENDING: FDCPE port map (WR_PENDING,WR_PENDING_D,DIOWn,WR_PENDING/WR_PENDING_RSTF,'0');
     WR_PENDING_D <= ((NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND XLXI_620/XLXN_43 AND CSEL AND FC_0_.OUT)
      OR (NOT DA0 AND NOT DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT XLXI_620/XLXN_43 AND NOT CSEL AND FC_0_.OUT));
WR_PENDING/WR_PENDING_RSTF <= ((NOT RESETn)
      OR (RESET_CTL.LFBK)
      OR (NOT ISA_WRITEn AND QSR(1).LFBK AND NOT QSR(2).LFBK));
FDCPE_WR_REQUEST: FDCPE port map (WR_REQUEST,WR_PENDING,CLK,NOT XLXN_428/XLXN_428_SETF__$INT,'0');
FDCPE_XLXI_385/Q3: FDCPE port map (XLXI_385/Q(3),XLXI_385/Q_D(3),CLK,NOT XLXN_428/XLXN_428_SETF__$INT,'0');
     XLXI_385/Q_D(3) <= ((NOT ISA_WRITEn AND NOT QSR(7).LFBK AND QSR(2).LFBK)
      OR (NOT ISA_READn AND NOT QSR(7).LFBK AND QSR(2).LFBK)
      OR (ISA_WRITEn AND ISA_READn AND NOT QSR(7).LFBK AND
      XLXI_385/Q(3).LFBK));
FDCPE_XLXI_385/Q4: FDCPE port map (XLXI_385/Q(4),XLXI_385/Q_D(4),CLK,NOT XLXN_428/XLXN_428_SETF__$INT,'0');
     XLXI_385/Q_D(4) <= ((NOT ISA_WRITEn AND NOT QSR(7).LFBK AND XLXI_385/Q(3).LFBK)
      OR (NOT ISA_READn AND NOT QSR(7).LFBK AND XLXI_385/Q(3).LFBK)
      OR (ISA_WRITEn AND ISA_READn AND NOT QSR(7).LFBK AND
      XLXI_385/Q(4).LFBK));
FTCPE_XLXI_620/XLXN_43: FTCPE port map (XLXI_620/XLXN_43,XLXI_620/XLXN_43_T,DIOWn,NOT RESETn,'0');
     XLXI_620/XLXN_43_T <= ((NOT DA0 AND DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND DD(4).PIN AND NOT XLXI_620/XLXN_43.LFBK)
      OR (NOT DA0 AND DA1 AND DA2 AND DMACKn AND CS1n AND NOT DMARQ AND
      NOT CS0n AND NOT DD(4).PIN AND XLXI_620/XLXN_43.LFBK));
XLXN_428/XLXN_428_SETF__$INT <= (RESETn AND NOT RESET_CTL);
FDCPE_XLXN_8020: FDCPE port map (XLXN_802(0),XLXN_802_D(0),CLK,'0','0');
     XLXN_802_D(0) <= ((QSR(5) AND XLXN_802(0).LFBK)
      OR (NOT QSR(5) AND SD(0).PIN));
FDCPE_XLXN_8021: FDCPE port map (XLXN_802(1),XLXN_802_D(1),CLK,'0','0');
     XLXN_802_D(1) <= ((QSR(5) AND XLXN_802(1).LFBK)
      OR (NOT QSR(5) AND SD(1).PIN));
FDCPE_XLXN_8022: FDCPE port map (XLXN_802(2),XLXN_802_D(2),CLK,'0','0');
     XLXN_802_D(2) <= ((QSR(5) AND XLXN_802(2).LFBK)
      OR (NOT QSR(5) AND SD(2).PIN));
FDCPE_XLXN_8023: FDCPE port map (XLXN_802(3),XLXN_802_D(3),CLK,'0','0');
     XLXN_802_D(3) <= ((QSR(5) AND XLXN_802(3).LFBK)
      OR (NOT QSR(5) AND SD(3).PIN));
FDCPE_XLXN_8024: FDCPE port map (XLXN_802(4),XLXN_802_D(4),CLK,'0','0');
     XLXN_802_D(4) <= ((QSR(5) AND XLXN_802(4).LFBK)
      OR (NOT QSR(5) AND SD(4).PIN));
FDCPE_XLXN_8025: FDCPE port map (XLXN_802(5),XLXN_802_D(5),CLK,'0','0');
     XLXN_802_D(5) <= ((QSR(5) AND XLXN_802(5).LFBK)
      OR (NOT QSR(5) AND SD(5).PIN));
FDCPE_XLXN_8026: FDCPE port map (XLXN_802(6),XLXN_802_D(6),CLK,'0','0');
     XLXN_802_D(6) <= ((QSR(5) AND XLXN_802(6).LFBK)
      OR (NOT QSR(5) AND SD(6).PIN));
FDCPE_XLXN_8027: FDCPE port map (XLXN_802(7),XLXN_802_D(7),CLK,'0','0');
     XLXN_802_D(7) <= ((QSR(5) AND XLXN_802(7).LFBK)
      OR (NOT QSR(5) AND SD(7).PIN));
FDCPE_XLXN_8030: FDCPE port map (XLXN_803(0),ITRP_STA(0).LFBK,NOT DIORn,'0','0');
FDCPE_XLXN_8031: FDCPE port map (XLXN_803(1),ITRP_STA(1),NOT DIORn,'0','0');
FDCPE_XLXN_8032: FDCPE port map (XLXN_803(2),ITRP_STA(2).LFBK,NOT DIORn,'0','0');
FDCPE_XLXN_8033: FDCPE port map (XLXN_803(3),ITRP_STA(3).LFBK,NOT DIORn,'0','0');
FDCPE_XLXN_8034: FDCPE port map (XLXN_803(4),'0',NOT DIORn,'0','0');
FDCPE_XLXN_8035: FDCPE port map (XLXN_803(5),'0',NOT DIORn,'0','0');
FDCPE_XLXN_8036: FDCPE port map (XLXN_803(6),'0',NOT DIORn,'0','0');
FDCPE_XLXN_8037: FDCPE port map (XLXN_803(7),'0',NOT DIORn,'0','0');
Register Legend:
      FDCPE (Q,D,C,CLR,PRE);
      FTCPE (Q,D,C,CLR,PRE);
      LDCP (Q,D,G,CLR,PRE);