Logic

Signal Name Total Pterms Total Inputs Function Block Macrocell Power Mode Slew Rate Pin Number Pin Type Pin Use Reg Init State
AEN 5 17 FB1 MC11 STD SLOW 7 I/O O SET
DD<0> 12 16 FB5 MC17 STD SLOW 44 I/O I/O  
DD<1> 12 16 FB5 MC5 STD SLOW 34 I/O I/O  
DD<2> 12 16 FB3 MC2 STD SLOW 14 I/O I/O  
DD<3> 12 16 FB3 MC5 STD SLOW 17 I/O I/O  
DD<4> 12 16 FB5 MC11 STD SLOW 39 I/O I/O  
DD<5> 12 16 FB3 MC8 STD SLOW 19 I/O I/O  
DD<6> 12 16 FB3 MC11 STD SLOW 21 I/O I/O  
DD<7> 12 16 FB3 MC14 STD SLOW 24 I/O I/O  
DH0 3 10 FB6 MC12 STD   53 I/O I RESET
DH1 3 10 FB6 MC10 STD     (b) (b) RESET
DH2 3 10 FB6 MC9 STD   51 I/O (b) RESET
DH3 3 10 FB6 MC7 STD     (b) (b) RESET
GATE_IORDY 5 17 FB1 MC18 STD     (b) (b) RESET
GATE_ITRP 5 16 FB6 MC18 STD     (b) (b) RESET
INTE_A 5 16 FB6 MC16 STD     (b) (b) RESET
INTE_B 5 16 FB6 MC15 STD   55 I/O I RESET
INTE_C 5 16 FB6 MC13 STD     (b) (b) RESET
INTE_D 5 17 FB2 MC18 STD     (b) (b) RESET
INTRQ 2 6 FB3 MC3 STD SLOW 15 I/O O  
IORDY 3 15 FB1 MC15 STD SLOW 11 I/O O  
IORn 1 2 FB3 MC16 STD SLOW 26 I/O O  
IOWn 1 2 FB1 MC3 STD SLOW 2 I/O O  
ISA_PULSE 4 8 FB3 MC18 STD     (b) (b) RESET
ISA_READn 5 7 FB5 MC2 STD SLOW 32 I/O O SET
ISA_RESET 1 2 FB3 MC9 STD SLOW 20 I/O O  
ISA_WRITEn 5 6 FB5 MC14 STD SLOW 41 I/O O SET
ITRP_STA<0> 2 4 FB6 MC5 STD   47 I/O I RESET
ITRP_STA<1> 2 4 FB6 MC4 STD     (b) (b) RESET
ITRP_STA<2> 2 4 FB2 MC13 STD     (b) (b) RESET
ITRP_STA<3> 2 4 FB2 MC10 STD     (b) (b) RESET
ITRPn 1 5 FB5 MC3 STD SLOW 33 I/O O  
$OpTx$FX_DC$18 2 2 FB1 MC9 STD   6 I/O I  
$OpTx$$OpTx$FX_DC$20_INV$52 1 3 FB1 MC7 STD     (b) (b)  
QSR<1> 5 7 FB4 MC18 STD     (b) (b) RESET
QSR<2> 5 7 FB4 MC16 STD     (b) (b) RESET
QSR<5> 5 7 FB4 MC15 STD   69 I/O I RESET
QSR<6> 5 7 FB4 MC13 STD     (b) (b) RESET
QSR<7> 4 6 FB4 MC7 STD     (b) (b) RESET
RD_PENDING 3 15 FB4 MC5 STD   61 I/O (b) RESET
RD_PENDING/RD_PENDING_RSTF 3 5 FB4 MC4 STD     (b) (b)  
RD_REQUEST 3 3 FB1 MC16 STD   12 I/O/GCK3 (b) RESET
REO 6 14 FB6 MC14 STD SLOW 54 I/O O  
RESET_CTL 5 17 FB4 MC12 STD   67 I/O I RESET
SA_HIGH<0> 5 17 FB2 MC12 STD SLOW 80 I/O O RESET
SA_HIGH<1> 5 17 FB2 MC15 STD SLOW 82 I/O O RESET
SA_HIGH<2> 5 16 FB6 MC3 STD SLOW 46 I/O O RESET
SA_HIGH<3> 5 17 FB4 MC11 STD SLOW 66 I/O O RESET
SA_HIGH<4> 5 17 FB4 MC14 STD SLOW 68 I/O O RESET
SA_HIGH<5> 5 17 FB4 MC17 STD SLOW 70 I/O O RESET
SA_HIGH<6> 5 17 FB4 MC3 STD SLOW 58 I/O O RESET
SA_HIGH<7> 5 17 FB2 MC17 STD SLOW 84 I/O O RESET
SA_LOW<0> 5 17 FB2 MC2 STD SLOW 71 I/O O RESET
SA_LOW<1> 5 17 FB2 MC3 STD SLOW 72 I/O O RESET
SA_LOW<2> 5 17 FB2 MC6 STD SLOW 75 I/O O RESET
SA_LOW<3> 5 16 FB6 MC17 STD SLOW 56 I/O O RESET
SA_LOW<4> 5 17 FB4 MC2 STD SLOW 57 I/O O RESET
SA_LOW<5> 5 17 FB4 MC6 STD SLOW 62 I/O O RESET
SA_LOW<6> 5 17 FB4 MC8 STD SLOW 63 I/O O RESET
SA_LOW<7> 5 17 FB2 MC11 STD SLOW 79 I/O O RESET
SD<0> 6 17 FB6 MC2 STD SLOW 45 I/O I/O RESET
SD<1> 6 17 FB6 MC6 STD SLOW 48 I/O I/O RESET
SD<2> 6 17 FB6 MC8 STD SLOW 50 I/O I/O RESET
SD<3> 6 18 FB5 MC8 STD SLOW 36 I/O I/O RESET
SD<4> 6 18 FB1 MC2 STD SLOW 1 I/O I/O RESET
SD<5> 6 18 FB1 MC5 STD SLOW 3 I/O I/O RESET
SD<6> 6 18 FB1 MC8 STD SLOW 5 I/O I/O RESET
SD<7> 6 17 FB6 MC11 STD SLOW 52 I/O I/O RESET
SELECTEDn 2 2 FB1 MC17 STD SLOW 13 I/O O  
SEQn 4 6 FB3 MC17 STD SLOW 31 I/O O SET
WR_DATA_ENABLE 4 6 FB5 MC18 STD     (b) (b) RESET
WR_PENDING 3 15 FB2 MC16 STD   83 I/O I RESET
WR_PENDING/WR_PENDING_RSTF 3 5 FB4 MC1 STD     (b) (b)  
WR_REQUEST 3 3 FB3 MC15 STD   25 I/O (b) RESET
XLXI_385/Q<3> 5 7 FB4 MC10 STD     (b) (b) RESET
XLXI_385/Q<4> 5 7 FB4 MC9 STD   65 I/O I RESET
XLXI_620/XLXN_43 3 10 FB1 MC14 STD   10 I/O/GCK2 GCK/I RESET
XLXN_428/XLXN_428_SETF__$INT 1 2 FB2 MC9 STD   77 I/O/GTS2 (b)  
XLXN_802<0> 3 4 FB3 MC4 STD     (b) (b) RESET
XLXN_802<1> 3 4 FB1 MC13 STD     (b) (b) RESET
XLXN_802<2> 3 4 FB1 MC12 STD   9 I/O/GCK1 GCK/I RESET
XLXN_802<3> 3 4 FB2 MC14 STD   81 I/O I RESET
XLXN_802<4> 3 4 FB5 MC15 STD   43 I/O I RESET
XLXN_802<5> 3 4 FB5 MC1 STD     (b) (b) RESET
XLXN_802<6> 3 4 FB5 MC13 STD     (b) (b) RESET
XLXN_802<7> 3 4 FB1 MC10 STD     (b) (b) RESET
XLXN_803<0> 1 1 FB6 MC1 STD     (b) (b) RESET
XLXN_803<1> 1 1 FB2 MC8 STD   76 I/O/GTS1 GTS RESET
XLXN_803<2> 1 1 FB2 MC7 STD     (b) (b) RESET
XLXN_803<3> 1 1 FB2 MC5 STD   74 I/O/GSR (b) RESET
XLXN_803<4> 0 0 FB1 MC6 STD   4 I/O I RESET
XLXN_803<5> 0 0 FB1 MC4 STD     (b) (b) RESET
XLXN_803<6> 0 0 FB1 MC1 STD     (b) (b) RESET
XLXN_803<7> 0 0 FB5 MC12 STD   40 I/O I RESET