Signal Name | Total Pterms | Total Inputs | Function Block | Macrocell | Power Mode | Slew Rate | Pin Number | Pin Type | Pin Use | Reg Init State |
---|---|---|---|---|---|---|---|---|---|---|
AEN | 5 | 16 | FB1 | MC11 | STD | SLOW | 7 | I/O | O | SET |
DD<0> | 16 | 16 | FB5 | MC17 | STD | SLOW | 44 | I/O | I/O | RESET |
DD<1> | 16 | 16 | FB5 | MC5 | STD | SLOW | 34 | I/O | I/O | RESET |
DD<2> | 16 | 16 | FB3 | MC2 | STD | SLOW | 14 | I/O | I/O | RESET |
DD<3> | 16 | 16 | FB3 | MC5 | STD | SLOW | 17 | I/O | I/O | RESET |
DD<4> | 4 | 15 | FB5 | MC11 | STD | SLOW | 39 | I/O | I/O | RESET |
DD<5> | 4 | 15 | FB3 | MC8 | STD | SLOW | 19 | I/O | I/O | RESET |
DD<6> | 4 | 15 | FB3 | MC11 | STD | SLOW | 21 | I/O | I/O | RESET |
DD<7> | 4 | 15 | FB3 | MC14 | STD | SLOW | 24 | I/O | I/O | RESET |
DH0 | 3 | 10 | FB6 | MC13 | STD | (b) | (b) | RESET | ||
DH1 | 3 | 10 | FB6 | MC12 | STD | 53 | I/O | I | RESET | |
DH2 | 3 | 10 | FB6 | MC10 | STD | (b) | (b) | RESET | ||
DH3 | 3 | 10 | FB6 | MC9 | STD | 51 | I/O | (b) | RESET | |
GATE_ITRP | 5 | 16 | FB3 | MC10 | STD | (b) | (b) | RESET | ||
INTE_A | 5 | 16 | FB6 | MC18 | STD | (b) | (b) | RESET | ||
INTE_B | 5 | 16 | FB6 | MC16 | STD | (b) | (b) | RESET | ||
INTE_C | 5 | 16 | FB6 | MC15 | STD | 55 | I/O | I | RESET | |
INTE_D | 5 | 16 | FB5 | MC18 | STD | (b) | (b) | RESET | ||
INTRQ | 2 | 5 | FB3 | MC3 | STD | SLOW | 15 | I/O | O | |
IORn | 4 | 16 | FB3 | MC16 | STD | SLOW | 26 | I/O | O | SET |
IOWn | 1 | 2 | FB1 | MC3 | STD | SLOW | 2 | I/O | O | |
ISA_RESET | 1 | 2 | FB3 | MC9 | STD | SLOW | 20 | I/O | O | |
ITRP_STA<0>/ITRP_STA<0>_RSTF__$INT | 1 | 2 | FB6 | MC7 | STD | (b) | (b) | |||
ITRP_STA<0> | 2 | 2 | FB2 | MC18 | STD | (b) | (b) | RESET | ||
ITRP_STA<1>/ITRP_STA<1>_RSTF__$INT | 1 | 2 | FB6 | MC5 | STD | 47 | I/O | I | ||
ITRP_STA<1> | 2 | 2 | FB2 | MC16 | STD | 83 | I/O | I | RESET | |
ITRP_STA<2>/ITRP_STA<2>_RSTF__$INT | 1 | 2 | FB5 | MC15 | STD | 43 | I/O | (b) | ||
ITRP_STA<2> | 2 | 2 | FB2 | MC14 | STD | 81 | I/O | I | RESET | |
ITRP_STA<3>/ITRP_STA<3>_RSTF__$INT | 1 | 2 | FB5 | MC1 | STD | (b) | (b) | |||
ITRP_STA<3> | 2 | 2 | FB4 | MC18 | STD | (b) | (b) | RESET | ||
ITRPn | 1 | 4 | FB5 | MC3 | STD | SLOW | 33 | I/O | O | |
RD_STATEn | 4 | 16 | FB3 | MC17 | STD | SLOW | 31 | I/O | O | SET |
REO | 6 | 14 | FB6 | MC14 | STD | SLOW | 54 | I/O | O | |
RESET_CTL | 5 | 16 | FB3 | MC12 | STD | 23 | I/O | (b) | RESET | |
SA_HIGH<0> | 5 | 16 | FB2 | MC12 | STD | SLOW | 80 | I/O | O | RESET |
SA_HIGH<1> | 5 | 16 | FB2 | MC15 | STD | SLOW | 82 | I/O | O | RESET |
SA_HIGH<2> | 5 | 16 | FB6 | MC3 | STD | SLOW | 46 | I/O | O | RESET |
SA_HIGH<3> | 5 | 16 | FB4 | MC11 | STD | SLOW | 66 | I/O | O | RESET |
SA_HIGH<4> | 5 | 16 | FB4 | MC14 | STD | SLOW | 68 | I/O | O | RESET |
SA_HIGH<5> | 5 | 16 | FB4 | MC17 | STD | SLOW | 70 | I/O | O | RESET |
SA_HIGH<6> | 5 | 16 | FB4 | MC3 | STD | SLOW | 58 | I/O | O | RESET |
SA_HIGH<7> | 5 | 16 | FB2 | MC17 | STD | SLOW | 84 | I/O | O | RESET |
SA_LOW<0> | 5 | 16 | FB2 | MC2 | STD | SLOW | 71 | I/O | O | RESET |
SA_LOW<1> | 5 | 16 | FB2 | MC3 | STD | SLOW | 72 | I/O | O | RESET |
SA_LOW<2> | 5 | 16 | FB2 | MC6 | STD | SLOW | 75 | I/O | O | RESET |
SA_LOW<3> | 5 | 16 | FB6 | MC17 | STD | SLOW | 56 | I/O | O | RESET |
SA_LOW<4> | 5 | 16 | FB4 | MC2 | STD | SLOW | 57 | I/O | O | RESET |
SA_LOW<5> | 5 | 16 | FB4 | MC6 | STD | SLOW | 62 | I/O | O | RESET |
SA_LOW<6> | 5 | 16 | FB4 | MC8 | STD | SLOW | 63 | I/O | O | RESET |
SA_LOW<7> | 5 | 16 | FB2 | MC11 | STD | SLOW | 79 | I/O | O | RESET |
SD<0> | 6 | 18 | FB6 | MC2 | STD | SLOW | 45 | I/O | I/O | RESET |
SD<1> | 6 | 18 | FB6 | MC6 | STD | SLOW | 48 | I/O | I/O | RESET |
SD<2> | 6 | 18 | FB6 | MC8 | STD | SLOW | 50 | I/O | I/O | RESET |
SD<3> | 6 | 18 | FB5 | MC8 | STD | SLOW | 36 | I/O | I/O | RESET |
SD<4> | 6 | 18 | FB1 | MC2 | STD | SLOW | 1 | I/O | I/O | RESET |
SD<5> | 6 | 18 | FB1 | MC5 | STD | SLOW | 3 | I/O | I/O | RESET |
SD<6> | 6 | 18 | FB1 | MC8 | STD | SLOW | 5 | I/O | I/O | RESET |
SD<7> | 6 | 18 | FB6 | MC11 | STD | SLOW | 52 | I/O | I/O | RESET |
SELECTEDn | 2 | 2 | FB1 | MC17 | STD | SLOW | 13 | I/O | O | |
WR_STATE_1n | 3 | 15 | FB5 | MC14 | STD | SLOW | 41 | I/O | O | SET |
WR_STATE_2n | 2 | 2 | FB5 | MC2 | STD | SLOW | 32 | I/O | O | SET |
XLXI_395/XLXN_43 | 3 | 10 | FB3 | MC13 | STD | (b) | (b) | RESET | ||
XLXN_409/XLXN_409_SETF__$INT | 1 | 2 | FB3 | MC15 | STD | 25 | I/O | (b) | ||
XLXN_428/XLXN_428_SETF__$INT | 1 | 2 | FB3 | MC18 | STD | (b) | (b) |