The project's status
What we will discuss can be thought of as an open-source design idea. We cannot deliver a blueprint of a ready-to-use random number generator, not to speak of a certified one. Only experiments have been conducted to demonstrate the feasibility.

License conditions
The technical solutions communicated here can be used freely (open-source hardware / open-source software). The terms of the CERN Open Hardware License Version 2 – Permissive apply. Functionality, suitability for any purpose, and freedom from other property rights cannot be guaranteed. The license terms – together with more detailed explanations – can be found at the following Internet addresses:

https://www.ohwr.org/project/cernohl/wikis/home

https://www.ohwr.org/project/cernohl/wikis/Documents/CERN-OHL-version-2

https://ohwr.org/cern_ohl_p_v2.pdf

German patent applications:

1.  Verfahren und Vorrichtung zum Erzeugen von Zufallszahlen
DE file number: 10 2015 010 518.3
Application date: August 13, 2015
https://register.dpma.de/DPMAregister/pat/register?AKZ=1020150105183

2.  Verfahren und Vorrichtung zum Erzeugen von Zufallszahlen durch Auswertung des Schwingungsverhaltens von Komparatoren
DE file number: 10 2016 005 082.9
Application date: April 27, 2016
https://register.dpma.de/DPMAregister/pat/register?AKZ=1020160050829

Both patents have lapsed.

It is not expedient to repeat the first experiments, conducted in 2015 and 2016. The descriptions and sources, however, may find their good use as a starting point for experiments and further development. For example, one could begin with one of the ubiquitous small microcontroller modules and, at first, find out whether some of the built-in peripherals, especially counters and comparators, may be of use or not. Random number generation and evaluation could be written in a convenient high-level language and executed on the microcontroller without needing a PC. I recommend, however, to write the innermost bit generation loop in assembler. Thus the program cycles generating the random bits will not depend on the intricacies of a compiler. (Please consider that an eventual certification may become invalid if the innermost algorithm is modified, even by minute deviations that may be caused by re-compiling.)  CPLD or FPGA design, if necessary, could be done not by drawing schematics but by describing the desired behavior, e.g., through a language like Verilog or VHDL.                

Reference designs and application notes:

Analog designers usually strife to avoid oscillations. The most common method is to provide for hysteresis, that is, to modify the reference voltage if the comparator's output level has changed.

This is to avoid that the differential voltage at the inputs remains in the linear region for some time. As soon as the output switches, the reference voltage is changed so that a larger input voltage swing in the opposite direction is required to switch back again. If the output signal switches on, the reference voltage is reduced, if it switches off, it is increased again. So small variations of the input voltage cannot cause the output to switch back, thus avoiding oscillations.

Papers and articles discuss the causes of the oscillations and how to prevent them. When reading with the converse intention, perhaps we could get some ideas on how to incite them ...

[1]     Kay, Art; Claycomb, Timothy: Comparator with Hysteresis Reference Design. TIDU020A. Texas Instruments Incorporated, 2013–2014.

https://www.ti.com/lit/ug/tidu020a/tidu020a.pdf

[2] Guide to Adding Extra Hysteresis to Comparators. Application Note 3616. Maxim Integrated Products,  2005.

https://www.maximintegrated.com/en/design/technical-documents/app-notes/3/3616.html

[3] Application Note 74. LM139/LM239/LM339 A Quad of Independently Functioning Comparators. Application Report SNOA654A. Texas Instruments, Incorporated, 2004–2013.

https://www.ti.com/lit/an/snoa654a/snoa654a.pdf

[4] Grohe, Paul: Application Design Guidelines for LM339, LM393, TL331Family Comparators Including the New B-versions. Application Report SNOAA35A. Texas Instruments, Incorporated, 2019–2020.

https://www.ti.com/lit/an/snoaa35a/snoaa35a.pdf

Some data sheets:

[5] LM339, LM239, LM139, LM2901 Quad Differential Comparators. Data Sheet SLCS006U. Texas Instruments, Incorporated, 1979–2018.

https://www.ti.com/lit/ds/symlink/lm2901.pdf

[6] TLV4011 Precision Comparator with Integrated Reference. Data Sheet SLVSFL9.  Texas Instruments, Incorporated, 2020.

https://www.ti.com/lit/ds/symlink/tlv4011.pdf

[7] LMV727x Single and Dual, 1.8-V Low Power Comparators With Rail-to-Rail Input. Data Sheet  SNOSA56I.   Texas Instruments, Incorporated, 2003–2015.

https://www.ti.com/lit/ds/symlink/lmv7271.pdf

[8] MAX40002–MAX40005/ MAX40012–MAX40015 nanoPower 4-Bump Comparator in Ultra-Tiny 0.73mm x 0.73mm WLP/SOT23 Packages. Data Sheet 19-8574. Maxim Integrated Products, Inc., 2020.

https://datasheets.maximintegrated.com/en/ds/MAX40002-MAX40005.pdf

[9] LTC1841/LTC1842/LTC1843 Ultralow Power Dual Comparators with Reference. Data Sheet 1284123f. Linear Technology Corporation, 1998 / Analog Devices, Inc., 2020.

https://www.analog.com/media/en/technical-documentation/data-sheets/184123f.pdf

We need comparators without built-in hysteresis. This obvious requirement could comparators in microcontrollers or FPGAs render not suitable. To be reasonable fast, the random number generator requires some or even many comparators. So especially tiny comparators are of particular interest.

Components of the experimental platform:
[10]    Matthes, Wolfgang: Microcontroller Modules for the Ambitious. Circuit Cellar, Issue 312, July 2016, S. 24-33.   

Datasheets, application notes, reference designs, tutorials, etc.:

https://www.analog.com

https://www.maximintegrated.com

https://www.ti.com

(I prefer to look first into the technical documentation manufacturers of real hardware provide, not into academic textbooks.)

November 22, 2020