********** Mapped Logic ********** |
FTCPE_LED16: FTCPE port map (LED(16),LED_T(16),C,'0','0');
LED_T(16) <= (ctr/CNT_L(0) AND ctr/CNT_L(10) AND ctr/CNT_L(11) AND ctr/CNT_L(12) AND ctr/CNT_L(13) AND ctr/CNT_L(14) AND ctr/CNT_L(1) AND ctr/CNT_L(2) AND ctr/CNT_L(3) AND ctr/CNT_L(4) AND ctr/CNT_L(5) AND ctr/CNT_L(6) AND ctr/CNT_L(7) AND ctr/CNT_L(8) AND ctr/CNT_L(9) AND ctr/CNT_L(15)); |
FTCPE_LED17: FTCPE port map (LED(17),LED_T(17),C,'0','0');
LED_T(17) <= (ctr/CNT_L(0) AND ctr/CNT_L(10) AND ctr/CNT_L(11) AND ctr/CNT_L(12) AND ctr/CNT_L(13) AND ctr/CNT_L(14) AND ctr/CNT_L(1) AND ctr/CNT_L(2) AND ctr/CNT_L(3) AND ctr/CNT_L(4) AND ctr/CNT_L(5) AND ctr/CNT_L(6) AND ctr/CNT_L(7) AND ctr/CNT_L(8) AND ctr/CNT_L(9) AND ctr/CNT_L(15) AND LED_16_OBUF.LFBK); |
FTCPE_LED18: FTCPE port map (LED(18),LED_T(18),C,'0','0');
LED_T(18) <= (LED(16) AND LED(17) AND ctr/CNT_L(0) AND ctr/CNT_L(10) AND ctr/CNT_L(11) AND ctr/CNT_L(12) AND ctr/CNT_L(13) AND ctr/CNT_L(14) AND ctr/CNT_L(1) AND ctr/CNT_L(2) AND ctr/CNT_L(3) AND ctr/CNT_L(4) AND ctr/CNT_L(5) AND ctr/CNT_L(6) AND ctr/CNT_L(7) AND ctr/CNT_L(8) AND ctr/CNT_L(9) AND ctr/CNT_L(15)); |
FTCPE_LED19: FTCPE port map (LED(19),LED_T(19),C,'0','0');
LED_T(19) <= (LED(16) AND LED(17) AND LED(18) AND ctr/CNT_L(0) AND ctr/CNT_L(10) AND ctr/CNT_L(11) AND ctr/CNT_L(12) AND ctr/CNT_L(13) AND ctr/CNT_L(14) AND ctr/CNT_L(1) AND ctr/CNT_L(2) AND ctr/CNT_L(3) AND ctr/CNT_L(4) AND ctr/CNT_L(5) AND ctr/CNT_L(6) AND ctr/CNT_L(7) AND ctr/CNT_L(8) AND ctr/CNT_L(9) AND ctr/CNT_L(15)); |
FTCPE_LED20: FTCPE port map (LED(20),LED_T(20),C,'0','0');
LED_T(20) <= (LED(16) AND LED(17) AND LED(18) AND LED(19) AND ctr/CNT_L(0) AND ctr/CNT_L(10) AND ctr/CNT_L(11) AND ctr/CNT_L(12) AND ctr/CNT_L(13) AND ctr/CNT_L(14) AND ctr/CNT_L(1) AND ctr/CNT_L(2) AND ctr/CNT_L(3) AND ctr/CNT_L(4) AND ctr/CNT_L(5) AND ctr/CNT_L(6) AND ctr/CNT_L(7) AND ctr/CNT_L(8) AND ctr/CNT_L(9) AND ctr/CNT_L(15)); |
FTCPE_LED21: FTCPE port map (LED(21),LED_T(21),C,'0','0');
LED_T(21) <= (LED(16) AND LED(17) AND LED(18) AND LED(20) AND ctr/CNT_L(0) AND ctr/CNT_L(10) AND ctr/CNT_L(11) AND ctr/CNT_L(12) AND ctr/CNT_L(13) AND ctr/CNT_L(14) AND ctr/CNT_L(1) AND ctr/CNT_L(2) AND ctr/CNT_L(3) AND ctr/CNT_L(4) AND ctr/CNT_L(5) AND ctr/CNT_L(6) AND ctr/CNT_L(7) AND ctr/CNT_L(8) AND ctr/CNT_L(9) AND ctr/CNT_L(15) AND LED_19_OBUF.LFBK); |
FTCPE_LED22: FTCPE port map (LED(22),LED_T(22),C,'0','0');
LED_T(22) <= (LED(16) AND LED(17) AND LED(18) AND LED(19) AND LED(20) AND LED(21) AND ctr/CNT_L(10) AND ctr/CNT_L(11) AND ctr/CNT_L(12) AND ctr/CNT_L(13) AND ctr/CNT_L(14) AND ctr/CNT_L(1) AND ctr/CNT_L(2) AND ctr/CNT_L(3) AND ctr/CNT_L(4) AND ctr/CNT_L(5) AND ctr/CNT_L(6) AND ctr/CNT_L(7) AND ctr/CNT_L(8) AND ctr/CNT_L(9) AND ctr/CNT_L(15) AND ctr/CNT_L(0).LFBK); |
FTCPE_LED23: FTCPE port map (LED(23),LED_T(23),C,'0','0');
LED_T(23) <= (LED(16) AND LED(17) AND LED(18) AND LED(19) AND LED(20) AND LED(21) AND LED(22) AND ctr/CNT_L(0) AND ctr/CNT_L(10).LFBK AND ctr/CNT_L(11).LFBK AND ctr/CNT_L(12).LFBK AND ctr/CNT_L(13).LFBK AND ctr/CNT_L(14).LFBK AND ctr/CNT_L(1).LFBK AND ctr/CNT_L(2).LFBK AND ctr/CNT_L(3).LFBK AND ctr/CNT_L(4).LFBK AND ctr/CNT_L(5).LFBK AND ctr/CNT_L(6).LFBK AND ctr/CNT_L(7).LFBK AND ctr/CNT_L(8).LFBK AND ctr/CNT_L(9).LFBK AND ctr/CNT_L(15).LFBK); |
FTCPE_ctr/CNT_L0: FTCPE port map (ctr/CNT_L(0),'1',C,'0','0'); |
FTCPE_ctr/CNT_L1: FTCPE port map (ctr/CNT_L(1),ctr/CNT_L(0),C,'0','0'); |
FTCPE_ctr/CNT_L2: FTCPE port map (ctr/CNT_L(2),ctr/CNT_L_T(2),C,'0','0');
ctr/CNT_L_T(2) <= (ctr/CNT_L(0) AND ctr/CNT_L(1).LFBK); |
FTCPE_ctr/CNT_L3: FTCPE port map (ctr/CNT_L(3),ctr/CNT_L_T(3),C,'0','0');
ctr/CNT_L_T(3) <= (ctr/CNT_L(0) AND ctr/CNT_L(1).LFBK AND ctr/CNT_L(2).LFBK); |
FTCPE_ctr/CNT_L4: FTCPE port map (ctr/CNT_L(4),ctr/CNT_L_T(4),C,'0','0');
ctr/CNT_L_T(4) <= (ctr/CNT_L(0) AND ctr/CNT_L(1).LFBK AND ctr/CNT_L(2).LFBK AND ctr/CNT_L(3).LFBK); |
FTCPE_ctr/CNT_L5: FTCPE port map (ctr/CNT_L(5),ctr/CNT_L_T(5),C,'0','0');
ctr/CNT_L_T(5) <= (ctr/CNT_L(0) AND ctr/CNT_L(1).LFBK AND ctr/CNT_L(2).LFBK AND ctr/CNT_L(3).LFBK AND ctr/CNT_L(4).LFBK); |
FTCPE_ctr/CNT_L6: FTCPE port map (ctr/CNT_L(6),ctr/CNT_L_T(6),C,'0','0');
ctr/CNT_L_T(6) <= (ctr/CNT_L(0) AND ctr/CNT_L(1).LFBK AND ctr/CNT_L(2).LFBK AND ctr/CNT_L(3).LFBK AND ctr/CNT_L(4).LFBK AND ctr/CNT_L(5).LFBK); |
FTCPE_ctr/CNT_L7: FTCPE port map (ctr/CNT_L(7),ctr/CNT_L_T(7),C,'0','0');
ctr/CNT_L_T(7) <= (ctr/CNT_L(0) AND ctr/CNT_L(1).LFBK AND ctr/CNT_L(2).LFBK AND ctr/CNT_L(3).LFBK AND ctr/CNT_L(4).LFBK AND ctr/CNT_L(5).LFBK AND ctr/CNT_L(6).LFBK); |
FTCPE_ctr/CNT_L8: FTCPE port map (ctr/CNT_L(8),ctr/CNT_L_T(8),C,'0','0');
ctr/CNT_L_T(8) <= (ctr/CNT_L(0) AND ctr/CNT_L(1).LFBK AND ctr/CNT_L(2).LFBK AND ctr/CNT_L(3).LFBK AND ctr/CNT_L(4).LFBK AND ctr/CNT_L(5).LFBK AND ctr/CNT_L(6).LFBK AND ctr/CNT_L(7).LFBK); |
FTCPE_ctr/CNT_L9: FTCPE port map (ctr/CNT_L(9),ctr/CNT_L_T(9),C,'0','0');
ctr/CNT_L_T(9) <= (ctr/CNT_L(0) AND ctr/CNT_L(1).LFBK AND ctr/CNT_L(2).LFBK AND ctr/CNT_L(3).LFBK AND ctr/CNT_L(4).LFBK AND ctr/CNT_L(5).LFBK AND ctr/CNT_L(6).LFBK AND ctr/CNT_L(7).LFBK AND ctr/CNT_L(8).LFBK); |
FTCPE_ctr/CNT_L10: FTCPE port map (ctr/CNT_L(10),ctr/CNT_L_T(10),C,'0','0');
ctr/CNT_L_T(10) <= (ctr/CNT_L(0) AND ctr/CNT_L(1).LFBK AND ctr/CNT_L(2).LFBK AND ctr/CNT_L(3).LFBK AND ctr/CNT_L(4).LFBK AND ctr/CNT_L(5).LFBK AND ctr/CNT_L(6).LFBK AND ctr/CNT_L(7).LFBK AND ctr/CNT_L(8).LFBK AND ctr/CNT_L(9).LFBK); |
FTCPE_ctr/CNT_L11: FTCPE port map (ctr/CNT_L(11),ctr/CNT_L_T(11),C,'0','0');
ctr/CNT_L_T(11) <= (ctr/CNT_L(0) AND ctr/CNT_L(10).LFBK AND ctr/CNT_L(1).LFBK AND ctr/CNT_L(2).LFBK AND ctr/CNT_L(3).LFBK AND ctr/CNT_L(4).LFBK AND ctr/CNT_L(5).LFBK AND ctr/CNT_L(6).LFBK AND ctr/CNT_L(7).LFBK AND ctr/CNT_L(8).LFBK AND ctr/CNT_L(9).LFBK); |
FTCPE_ctr/CNT_L12: FTCPE port map (ctr/CNT_L(12),ctr/CNT_L_T(12),C,'0','0');
ctr/CNT_L_T(12) <= (ctr/CNT_L(0) AND ctr/CNT_L(10).LFBK AND ctr/CNT_L(11).LFBK AND ctr/CNT_L(1).LFBK AND ctr/CNT_L(2).LFBK AND ctr/CNT_L(3).LFBK AND ctr/CNT_L(4).LFBK AND ctr/CNT_L(5).LFBK AND ctr/CNT_L(6).LFBK AND ctr/CNT_L(7).LFBK AND ctr/CNT_L(8).LFBK AND ctr/CNT_L(9).LFBK); |
FTCPE_ctr/CNT_L13: FTCPE port map (ctr/CNT_L(13),ctr/CNT_L_T(13),C,'0','0');
ctr/CNT_L_T(13) <= (ctr/CNT_L(0) AND ctr/CNT_L(10).LFBK AND ctr/CNT_L(11).LFBK AND ctr/CNT_L(12).LFBK AND ctr/CNT_L(1).LFBK AND ctr/CNT_L(2).LFBK AND ctr/CNT_L(3).LFBK AND ctr/CNT_L(4).LFBK AND ctr/CNT_L(5).LFBK AND ctr/CNT_L(6).LFBK AND ctr/CNT_L(7).LFBK AND ctr/CNT_L(8).LFBK AND ctr/CNT_L(9).LFBK); |
FTCPE_ctr/CNT_L14: FTCPE port map (ctr/CNT_L(14),ctr/CNT_L_T(14),C,'0','0');
ctr/CNT_L_T(14) <= (ctr/CNT_L(0) AND ctr/CNT_L(10).LFBK AND ctr/CNT_L(11).LFBK AND ctr/CNT_L(12).LFBK AND ctr/CNT_L(13).LFBK AND ctr/CNT_L(1).LFBK AND ctr/CNT_L(2).LFBK AND ctr/CNT_L(3).LFBK AND ctr/CNT_L(4).LFBK AND ctr/CNT_L(5).LFBK AND ctr/CNT_L(6).LFBK AND ctr/CNT_L(7).LFBK AND ctr/CNT_L(8).LFBK AND ctr/CNT_L(9).LFBK); |
FTCPE_ctr/CNT_L15: FTCPE port map (ctr/CNT_L(15),ctr/CNT_L_T(15),C,'0','0');
ctr/CNT_L_T(15) <= (ctr/CNT_L(0) AND ctr/CNT_L(10).LFBK AND ctr/CNT_L(11).LFBK AND ctr/CNT_L(12).LFBK AND ctr/CNT_L(13).LFBK AND ctr/CNT_L(14).LFBK AND ctr/CNT_L(1).LFBK AND ctr/CNT_L(2).LFBK AND ctr/CNT_L(3).LFBK AND ctr/CNT_L(4).LFBK AND ctr/CNT_L(5).LFBK AND ctr/CNT_L(6).LFBK AND ctr/CNT_L(7).LFBK AND ctr/CNT_L(8).LFBK AND ctr/CNT_L(9).LFBK); |
Register Legend:
FDCPE (Q,D,C,CLR,PRE); FTCPE (Q,D,C,CLR,PRE); LDCP (Q,D,G,CLR,PRE); |