Logic

Signal Name Total Pterms Total Inputs Function Block Macrocell Power Mode Slew Rate Pin Number Pin Type Pin Use Reg Init State
DD<4> 5 9 FB1 MC2 STD SLOW 1 I/O I/O RESET
PORTE<0> 5 16 FB1 MC3 STD SLOW 2 I/O I/O RESET
PORTE<1> 5 16 FB1 MC5 STD SLOW 3 I/O I/O RESET
PORTB<0> 5 16 FB1 MC6 STD SLOW 4 I/O I/O RESET
PORTB<1> 5 16 FB1 MC8 STD SLOW 5 I/O I/O RESET
PORTA<0> 5 16 FB1 MC9 STD SLOW 6 I/O I/O RESET
PORTD<0> 5 16 FB1 MC11 STD SLOW 7 I/O I/O RESET
XLXI_85/DIR<0> 4 15 FB1 MC12 STD   9 I/O/GCK1 GCK RESET
XLXI_82/DIR<0> 4 15 FB1 MC14 STD   10 I/O/GCK2 GCK/I RESET
PORTC<0> 5 16 FB1 MC15 STD SLOW 11 I/O I/O RESET
XLXI_80/DIR<1> 4 15 FB1 MC16 STD   12 I/O/GCK3 (b) RESET
DH0n 2 9 FB1 MC17 STD SLOW 13 I/O O SET
DD<1> 5 9 FB3 MC2 STD SLOW 14 I/O I/O RESET
PORTE<4> 5 16 FB3 MC3 STD SLOW 15 I/O I/O RESET
PORTE<5> 5 16 FB3 MC5 STD SLOW 17 I/O I/O RESET
PORTB<4> 5 16 FB3 MC6 STD SLOW 18 I/O I/O RESET
PORTB<5> 5 16 FB3 MC8 STD SLOW 19 I/O I/O RESET
PORTA<4> 5 16 FB3 MC9 STD SLOW 20 I/O I/O RESET
PORTD<4> 5 16 FB3 MC11 STD SLOW 21 I/O I/O RESET
PORTC<4> 5 16 FB3 MC12 STD SLOW 23 I/O I/O RESET
DD<7> 1 4 FB3 MC14 STD SLOW 24 I/O I/O  
XLXI_82/DIR<5> 4 15 FB3 MC15 STD   25 I/O (b) RESET
XLXI_82/DIR<4> 4 15 FB3 MC16 STD   26 I/O I RESET
XLXI_80/DIR<5> 4 15 FB3 MC17 STD   31 I/O I RESET
DD<6> 5 9 FB5 MC2 STD SLOW 32 I/O I/O RESET
PORTA<1> 5 16 FB5 MC3 STD SLOW 33 I/O I/O RESET
PORTA<3> 5 16 FB5 MC5 STD SLOW 34 I/O I/O RESET
PORTA<5> 5 16 FB5 MC6 STD SLOW 35 I/O I/O RESET
PORTD<1> 5 16 FB5 MC8 STD SLOW 36 I/O I/O RESET
PORTD<3> 5 16 FB5 MC9 STD SLOW 37 I/O I/O RESET
PORTC<1> 5 16 FB5 MC11 STD SLOW 39 I/O I/O RESET
PORTC<3> 5 16 FB5 MC12 STD SLOW 40 I/O I/O RESET
DH1n 2 9 FB5 MC14 STD SLOW 41 I/O O SET
DH3n 2 9 FB5 MC15 STD SLOW 43 I/O O SET
XLXI_85/DIR<3> 4 15 FB5 MC17 STD   44 I/O I RESET
DD<0> 5 9 FB6 MC2 STD SLOW 45 I/O I/O RESET
DD<5> 5 9 FB6 MC3 STD SLOW 46 I/O I/O RESET
PORTA<7> 5 16 FB6 MC5 STD SLOW 47 I/O I/O RESET
PORTD<5> 5 16 FB6 MC6 STD SLOW 48 I/O I/O RESET
PORTD<7> 5 16 FB6 MC8 STD SLOW 50 I/O I/O RESET
PORTC<5> 5 16 FB6 MC9 STD SLOW 51 I/O I/O RESET
PORTC<7> 5 16 FB6 MC11 STD SLOW 52 I/O I/O RESET
SELECTEDn 2 2 FB6 MC12 STD SLOW 53 I/O O  
XLXI_87/DIR<7> 4 15 FB6 MC14 STD   54 I/O I RESET
XLXI_87/DIR<5> 4 15 FB6 MC15 STD   55 I/O I RESET
XLXI_86/DIR<5> 4 15 FB6 MC17 STD   56 I/O I RESET
REO 10 13 FB4 MC2 STD SLOW 57 I/O O  
DD<2> 5 9 FB4 MC3 STD SLOW 58 I/O I/O RESET
PORTE<6> 5 16 FB4 MC5 STD SLOW 61 I/O I/O RESET
PORTE<7> 5 16 FB4 MC6 STD SLOW 62 I/O I/O RESET
PORTB<6> 5 16 FB4 MC8 STD SLOW 63 I/O I/O RESET
PORTB<7> 5 16 FB4 MC9 STD SLOW 65 I/O I/O RESET
PORTA<6> 5 16 FB4 MC11 STD SLOW 66 I/O I/O RESET
PORTD<6> 5 16 FB4 MC12 STD SLOW 67 I/O I/O RESET
PORTC<6> 5 16 FB4 MC14 STD SLOW 68 I/O I/O RESET
XLXI_82/DIR<7> 4 15 FB4 MC15 STD   69 I/O I RESET
XLXI_80/DIR<7> 4 15 FB4 MC17 STD   70 I/O I RESET
DD<3> 5 9 FB2 MC2 STD SLOW 71 I/O I/O RESET
PORTE<2> 5 16 FB2 MC3 STD SLOW 72 I/O I/O RESET
XLXI_87/DIR<2> 4 15 FB2 MC5 STD   74 I/O/GSR GSR RESET
PORTE<3> 5 16 FB2 MC6 STD SLOW 75 I/O I/O RESET
XLXI_85/DIR<2> 4 15 FB2 MC8 STD   76 I/O/GTS1 GTS RESET
XLXI_82/DIR<3> 4 15 FB2 MC9 STD   77 I/O/GTS2 (b) RESET
PORTB<2> 5 16 FB2 MC11 STD SLOW 79 I/O I/O RESET
PORTB<3> 5 16 FB2 MC12 STD SLOW 80 I/O I/O RESET
PORTA<2> 5 16 FB2 MC14 STD SLOW 81 I/O I/O RESET
PORTD<2> 5 16 FB2 MC15 STD SLOW 82 I/O I/O RESET
PORTC<2> 5 16 FB2 MC16 STD SLOW 83 I/O I/O RESET
DH2n 2 9 FB2 MC17 STD SLOW 84 I/O O SET
DD<7>_BUFR_1_ 2 6 FB1 MC4 STD     (b) (b) D     RESET
XLXI_87/DIR<0> 4 15 FB1 MC7 STD     (b) (b) T     RESET
XLXI_86/DIR<0> 4 15 FB1 MC10 STD     (b) (b) T     RESET
XLXI_82/DIR<1> 4 15 FB1 MC13 STD     (b) (b) T     RESET
XLXI_80/DIR<0> 4 15 FB1 MC18 STD     (b) (b) T     RESET
DD<7>_BUFR_0_ 2 6 FB2 MC4 STD     (b) (b) D     RESET
XLXI_86/DIR<2> 4 15 FB2 MC7 STD     (b) (b) T     RESET
XLXI_82/DIR<2> 4 15 FB2 MC10 STD     (b) (b) T     RESET
XLXI_80/DIR<3> 4 15 FB2 MC13 STD     (b) (b) T     RESET
XLXI_80/DIR<2> 4 15 FB2 MC18 STD     (b) (b) T     RESET
XLXI_178/XLXN_43 2 9 FB3 MC4 STD     (b) (b) T     RESET
XLXI_87/DIR<4> 4 15 FB3 MC7 STD     (b) (b) T     RESET
XLXI_86/DIR<4> 4 15 FB3 MC10 STD     (b) (b) T     RESET
XLXI_85/DIR<4> 4 15 FB3 MC13 STD     (b) (b) T     RESET
XLXI_80/DIR<4> 4 15 FB3 MC18 STD     (b) (b) T     RESET
XLXI_87/DIR<6> 4 15 FB4 MC7 STD     (b) (b) T     RESET
XLXI_86/DIR<6> 4 15 FB4 MC10 STD     (b) (b) T     RESET
XLXI_85/DIR<6> 4 15 FB4 MC13 STD     (b) (b) T     RESET
XLXI_82/DIR<6> 4 15 FB4 MC16 STD     (b) (b) T     RESET
XLXI_80/DIR<6> 4 15 FB4 MC18 STD     (b) (b) T     RESET
XLXI_87/DIR<3> 4 15 FB5 MC4 STD     (b) (b) T     RESET
XLXI_87/DIR<1> 4 15 FB5 MC7 STD     (b) (b) T     RESET
XLXI_86/DIR<3> 4 15 FB5 MC10 STD     (b) (b) T     RESET
XLXI_86/DIR<1> 4 15 FB5 MC13 STD     (b) (b) T     RESET
XLXI_85/DIR<5> 4 15 FB5 MC16 STD     (b) (b) T     RESET
XLXI_85/DIR<1> 4 15 FB5 MC18 STD     (b) (b) T     RESET
DD<7>_BUFR_2_ 1 5 FB6 MC13 STD     (b) (b) D     RESET
XLXI_86/DIR<7> 4 15 FB6 MC16 STD     (b) (b) T     RESET
XLXI_85/DIR<7> 4 15 FB6 MC18 STD     (b) (b) T     RESET