Signal Name | Total Pterms | Total Inputs | Function Block | Macrocell | Power Mode | Slew Rate | Pin Number | Pin Type | Pin Use | Reg Init State |
---|---|---|---|---|---|---|---|---|---|---|
CT3<7> | 3 | 14 | FB1 | MC11 | STD | 6 | I/O/GCK2 | (b) | RESET | |
CT3<0> | 3 | 14 | FB1 | MC12 | STD | (b) | (b) | RESET | ||
CT3<6> | 4 | 14 | FB1 | MC13 | STD | (b) | (b) | RESET | ||
CT3<1> | 4 | 14 | FB1 | MC14 | STD | 7 | I/O/GCK3 | (b) | RESET | |
CT3A | 2 | 6 | FB1 | MC15 | STD | SLOW | 8 | I/O | O | SET |
CT3<5> | 5 | 14 | FB1 | MC16 | STD | (b) | (b) | RESET | ||
CT3B | 3 | 7 | FB1 | MC17 | STD | SLOW | 9 | I/O | O | SET |
CT3<2> | 5 | 14 | FB1 | MC18 | STD | (b) | (b) | RESET | ||
XBUS<3> | 5 | 8 | FB2 | MC2 | STD | SLOW | 35 | I/O | I/O | |
XBUS<2> | 5 | 8 | FB2 | MC5 | STD | SLOW | 36 | I/O | I/O | |
XBUS<1> | 5 | 8 | FB2 | MC6 | STD | SLOW | 37 | I/O | I/O | |
XBUS<0> | 5 | 8 | FB2 | MC8 | STD | SLOW | 38 | I/O | I/O | |
CT0<7> | 3 | 14 | FB2 | MC10 | STD | (b) | (b) | RESET | ||
CT0<0> | 3 | 14 | FB2 | MC11 | STD | 40 | I/O/GTS2 | (b) | RESET | |
CT0<6> | 4 | 14 | FB2 | MC12 | STD | (b) | (b) | RESET | ||
CT0<1> | 4 | 14 | FB2 | MC13 | STD | (b) | (b) | RESET | ||
CT0<5> | 5 | 14 | FB2 | MC14 | STD | 42 | I/O/GTS1 | GTS | RESET | |
GTS_OUT | 2 | 4 | FB2 | MC15 | STD | SLOW | 43 | I/O | O | |
CT0<2> | 5 | 14 | FB2 | MC16 | STD | (b) | (b) | RESET | ||
CT0<4> | 6 | 14 | FB2 | MC17 | STD | 44 | I/O | (b) | RESET | |
CT0<3> | 6 | 14 | FB2 | MC18 | STD | (b) | (b) | RESET | ||
CT2<7> | 3 | 14 | FB3 | MC1 | STD | (b) | (b) | RESET | ||
CT0A | 2 | 6 | FB3 | MC2 | STD | SLOW | 11 | I/O | O | SET |
CT0B | 3 | 7 | FB3 | MC5 | STD | SLOW | 12 | I/O | O | SET |
CT2<0> | 3 | 14 | FB3 | MC6 | STD | (b) | (b) | RESET | ||
CT2<6> | 4 | 14 | FB3 | MC7 | STD | (b) | (b) | RESET | ||
CT1A | 2 | 6 | FB3 | MC8 | STD | SLOW | 13 | I/O | O | SET |
CT1B | 3 | 7 | FB3 | MC9 | STD | SLOW | 14 | I/O | O | SET |
CT2<1> | 4 | 14 | FB3 | MC10 | STD | (b) | (b) | RESET | ||
CT2A | 2 | 6 | FB3 | MC11 | STD | SLOW | 18 | I/O | O | SET |
CT2<5> | 5 | 14 | FB3 | MC12 | STD | (b) | (b) | RESET | ||
CT2<2> | 5 | 14 | FB3 | MC13 | STD | (b) | (b) | RESET | ||
CT2B | 3 | 7 | FB3 | MC14 | STD | SLOW | 19 | I/O | O | SET |
CT3<4> | 6 | 14 | FB3 | MC15 | STD | 20 | I/O | (b) | RESET | |
CT3<3> | 6 | 14 | FB3 | MC16 | STD | (b) | (b) | RESET | ||
CT2<4> | 6 | 14 | FB3 | MC17 | STD | 22 | I/O | (b) | RESET | |
CT2<3> | 6 | 14 | FB3 | MC18 | STD | (b) | (b) | RESET | ||
CT1<7> | 3 | 14 | FB4 | MC7 | STD | (b) | (b) | RESET | ||
CT1<0> | 3 | 14 | FB4 | MC8 | STD | 26 | I/O | I | RESET | |
CT1<6> | 4 | 14 | FB4 | MC9 | STD | 27 | I/O | I | RESET | |
CT1<1> | 4 | 14 | FB4 | MC10 | STD | (b) | (b) | RESET | ||
XBUS<7> | 5 | 8 | FB4 | MC11 | STD | SLOW | 28 | I/O | O | |
CT1<5> | 5 | 14 | FB4 | MC12 | STD | (b) | (b) | RESET | ||
CT1<2> | 5 | 14 | FB4 | MC13 | STD | (b) | (b) | RESET | ||
XBUS<6> | 5 | 8 | FB4 | MC14 | STD | SLOW | 29 | I/O | O | |
XBUS<5> | 5 | 8 | FB4 | MC15 | STD | SLOW | 33 | I/O | O | |
CT1<4> | 6 | 14 | FB4 | MC16 | STD | (b) | (b) | RESET | ||
XBUS<4> | 5 | 8 | FB4 | MC17 | STD | SLOW | 34 | I/O | I/O | |
CT1<3> | 6 | 14 | FB4 | MC18 | STD | (b) | (b) | RESET |